Some highlights of my work in this field:

Other Papers

JOURNAL PUBLICATIONS: 

  1. "Selfish Distributed Compression Over Networks: Correlation Induces Anarchy"Ramamoorthy, V. Roychowdhury, S. K. Singh, IEEE Trans on Information Theory, 58(5):3182 - 3197 (May 2012)
  2. "Re-inventing Willis", M. Simkin and V. Roychowdhury, Physics Reports, 502(1):1 - 35 (May 2011) LINK
  3. "An explanation of the distribution of inter-seizure intervals", Simkin, M.V., Roychowdhury, V.P., 2010 European Physics Letters; 58005-p1 to 58005-p4, 91(5):1 - 4 (09/23/2010) doi: 10.1209/0295-5075/91/58005  
  4. "Distributed Resource Sharing in Low-Latency Wireless Ad Hoc Networks", Rezaei, B., Sarshar, N., Roychowdhury, V., IEEE/ACM Transactions on Networking, 18(1):190 - 201 (February 2010)  
  5. "Diversification in the Internet Economy: The Role of For-Profit Mediators", Singh, S.K. Roychowdhury, V., Gunadhi, H., Rezaei, B., ACM SIGecom Exchanges, 7(3):1 - 24 (November 2008)  
  6. "Experience Versus Talent Shapes the Structure of the Web", Kong, J.S., Sarshar, N., Roychowdhury, V., Proceedings of the National Academy of Sciences (PNAS), 105(37):13724 - 13729 (09/16/2008)  
  7. "SUPNET: An End-to-End Solution to Scalable Unstructured P2P Networking", Sarshar, N., Roychowdhury, V., Peer-to-Peer Networking and Applications, Springer, 1(2):122 - 138 (July 2008)  
  8. "Low Latency Wireless Ad Hoc Networking: Power and Bandwidth Challenges and a Solution", Sarshar, N., Rezaei, B., Roychowdhury, V., IEEE/ACM Transactions on Networking, 16(2):335 - 346 (April 2008)  
  9. "A Theory of Web Traffic", Simkin, M.V., Roychowdhury, V., A Letters Journal Explaining the Frontiers of Physics, 82(28006):1 - 6 (April 2008)  
  10. "Resilience of Structured P2P Systems under Churn: the Reachable Component Method", Kong, J.S., Bridgewater, J., Roychowdhury, V., Computer Communications, Elsiever Press, U.K., 31:2109 - 2123 (February 2008)  
  11. "Preferential survival in models of complex ad hoc networks", Kong, J.S., Roychowdhury, V., Physica A: Statistical Mechanics and its Applications, Elsevier B.V., 387:3335 - 3347 (February 2008)  
  12. "Comparison of Image Similarity Queries in P2P Systems", Mueller, W., Boykin, P.O., Sarshar, N., Roychowdhury, V., Computer Communications, UK: Elseiver Press, 31(2):375 - 386 (February 2008)  
  13. "Capacity Constraints and the Inevitability of Mediators in Adword Auctions", Singh, S.K., Roychowdbury, V., Gunadhi, H., Rezaei, B., Lecture Notes in Computer Science, Springer Berlin/Heidelberg, 4858:318 - 325 (2007)  
  14. "Balanced Overlay Networks (BON): An Overlay Technology for Decentralized Load Balancing", Bridgewater, J., Boykin, P.O., Roychowdhury, V., IEEE Transactions on Parallel and Distributed Systems, 18(8):1122 - 1133 (August 2007)  
  15. "Disaster Management in Power-Law Networks: Recovery from and Protection Against Intentional Attacks", Rezaei, B., Sarshar, N., Boykin, P., Roychowdhury, V., Physica A: Statistical Mechanics and its Applications, Elsevier B.V., 381:497 - 514 (March 2007)  
  16. "Collaborative Spam Filtering Using E-Mail Networks", Kong, J.S., Rezaei, B.A., Sarshar, N., Boykin, P.O., Roychowdhury, V.P., IEEE Computer Magazine, IEEE Computer Society, 39(8):67 - 73 (August 2006)  
  17. "Scalable percolation search on complex networks", Sarshara, N., Boykin, O., Roychowdhury, V., Theoretical Computer Science, 355:48 - 64 (04/06/2006)  
  18. "Assessment of long-range correlation in time series: How to avoid pitfalls", Gao, J., Hu, J., Tung, W.-W., Cao, Y., Sarshar, N., Roychowdhury, V.P., Physical Review E, 73(016117):1 - 10 (01/13/2006)  
  19. "Multiple power-law structures in heterogeneous complex networks", Sarshar, N., Roychowdhury, V., Physical Review E, 72(02611):1 - 11 (August 2005)  
  20. "Statistical Mechanical Load Balancer for the Web", Bridgewater, J.S.A., Boykin, P.O., Roychowdhury, V.P., Physical Review E, 71(046133):1 - 10 (April 2005)  
  21. "Leveraging Social Networks to Fight Spam", Boykin, P.O., Roychowdhury, V.P., Computer, IEEE Computer Society, 38(4):61 - 68 (April 2005)  
  22. "Scale-free and stable structures in complex ad hoc networks", Sarshar, N., Roychowdhury, V., PHYSICAL REVIEW E, 69(026101):1 - 6 (February 2004)  
  23. "Network Component Analysis: Reconstruction of Regulatory Signals in Biological Systems", Liao, J.C., Boscolo, R., Yang, Y.-L., Tran, L.M., Sabatti, C., Roychowdhury, V.P., Proc. National Academy of Sciences, 100(26):15522 - 15527 (12/23/2003)  
  24. "RF/Wireless Interconnect for Inter- and Intra-Chip Communications", Zhang, L.Y., Qian, Y., Chang, M.F., Roychowdhury, V., Kang, Z.J., Zhou, S., IEEE Proceedings Special Issue: Interconnections - Addressing the Next Challenge of IC Technology, 89(4):456 - 466 (April 2001)  
  25. "Modelling and Analysis of Communication Overhead for Parallel Matrix Algorithms", Wang, X., Roychowdhury, V.P., Mathematical and Computer Modelling, 32:349 - 379 (2000)  
  26. "Task Matching and Scheduling in Heterogeneous Computing Environments Using a Genetic-Algorithm-Based Approach", Wang, L., Siegel, H.J., Roychowdhury, V.P., Maciejewski, A.A., JPDC Special Issue: Parallel Evolutionary Computing, (47):8 - 22 (1997)
  27. "Scalable Massively Parallel Algorithms for Computational Nanoelectronics", Wang, X., Roychowdhury, V.P., Balasingam, P., Parallel Computing, (22):1931 - 1963 (1997)
  28. "Optimal Communication Algorithms for Heterogeneous Computing Over ATM Networks", Wang, X., Roychowdhury, V.P., Journal of Parallel and Distributed Computing, (1997) 18 pages  
  29. "Scheduling In and Out Forests in the Presence of Communication Delays", Varvarigou, T.A., Roychowdhury, V.P., Kailath, T., Lawler, E., IEEE Trans. on Parallel Distributed Systems, 7(10):1065 - 1074 (October 1996)  
  30. "Computational Paradigms in Nanoelectronics: Quantum Coupled Single Electron Logic and Neuromorphic Networks", Roychowdhury, V.P., Bandyopadhyay, S., Japanese Journal of Applied Physics (JJAP), 35(6A):3350 - 3362 (June 1996) Pt. 1  
  31. "Granular Nanoelectronics: The Logical Gateway to the 21st Century", Roychowdhury, V.P., Bandyopadhyay, S., IEEE Potentials Magazine, 15(2):8 - 11 (April 1996) April/May 1996  
  32. "Vector Analysis of Threshold Functions", Roychowdhury, V.P., Siu, K.-Y., Orlitsky, A., Kailath, T., Information and Computation, 120(1):22 - 31 (July 1995)  
  33. "Toward Massively Parallel Design of Multipliers", Siu, K.-Y., Roychowdhury, V.P., Kailath, T., Journal of Parallel and Distributed Computing, 24(1):86 - 93 (January 1995)  
  34. "On Optimal Depth Threshold Circuits for Multiplication and Related Problems", Siu, K.-Y., Roychowdhury, V.P., SIAM Journal on Discrete Mathematics, 7(2):284 - 292 (May 1994)  
  35. "Rational Approximation Techniques for Analysis of Neural Networks", Siu, K.-Y., Roychowdhury, V.P., Kailath, T., IEEE Trans. on Information Theory, 40(2):455 - 466 (March 1994)  
  36. "Lower Bounds on Threshold and Related Circuits via Communication Complexity", Roychowdhury, V.P., Orlitsky, A., Siu, K.-Y., IEEE Trans. on Information Theory, 40(2):467 - 474 (March 1994)  
  37. "Reconfiguring Processor Arrays Using Multiple-Track Models: The 3-Track-1-Spare-Approach", Varvarigou, T.A., Roychowdhury, V.P., Kailath, T., IEEE Trans. on Computers, 42(11):1281 - 1293 (November 1993)  
  38. "A Polynomial Time Algorithm for Reconfiguring Multiple-Track Models", Varvarigou, T.A., Roychowdhury, V.P., Kailath, T., IEEE Trans. on Computers, 42(4):385 - 395 (April 1993)  
  39. "Segmented Channel Routing", Roychowdhury, V.P., Greene, J.W., El Gamal, A., IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 12(1):75 - 95 (January 1993)  
  40. "Depth-Size Tradeoffs for Neural Computation", Siu, K.Y., Roychowdhury, V.P., Kailath, T., IEEE Trans. on Computers: Special Issue on Artificial Neural Networks, 40(12):1402 - 1412 (December 1991)  
  41. "New Algorithms for Reconfiguring VLSI/WSI Arrays", Varvarigou, T.A., Roychowdhury, V.P., Kailath, T., Journal of VLSI Signal Processing, 3(4):329 - 344 (October 1991)  
  42. "How to Play Bowling in Parallel on the Grid", Bruck, J., Roychowdhury, V.P., Journal of Algorithms, 12:516 - 529 (September 1991)  
  43. "Efficient Algorithms for Reconfiguration in VLSI/WSI Arrays", Roychowdhury, V.P., Bruck, J., Kailath, T., IEEE Trans. on Computers: Special Issue on Fault-Tolerant Computing, 39(4):480 - 489 (April 1990)  
  44. "On the Number of Spurious Memories in the Hopfield Model", Bruck, J., Roychowdhury, V.P., IEEE Trans. on Information Theory, 36(2):393 - 397 (March 1990)  
  45. "Subspace Scheduling and Parallel Implementation of Non-Systolic Regular Iterative Algorithms", Roychowdhury, V.P., Kailath, T., Journal of VLSI Signal Processing: Special Issue on Systolic Arrays, 1(2):127 - 143 (December 1989)  
  46. "Discrete Neural Computation: A Theoretical Foundation", Siu, K.Y., Roychowdhury, V.P., Kailath, T., Prentice Hall, (January 1995) 407 pages  
  47. "Segmented Channel Routing: Complexity and Algorithms", Roychowdhury, V.P., DasGupta, B., Advanced Routing of Electronic Modules, M. Pecht and Y.T. Wong, eds., New York, CRC Press (Eds.), (1995)  
  48. "Theoretical Advances in Neural Computation and Learning", Roychowdhury, V.P., Siu, K.Y., Orlitsky, A., Kluwer Academic Publishers (Ed.), (October 1994) 468 pages
  49. "Two Geometric Optimization Problems", DasGupta, B., Roychowdhury, V.P., New Advances in Optimization and Approximation, Ding-Zhu Du and Jie Sun, eds., Boston, Kluwer Academic Publishers (Eds.), 30-57 (1994)  
  50. "Efficient Algorithms for Reconfiguration in VLSI/WSI Arrays", Roychowdhury, V.P., Bruck, J., Kailath, T., Manufacturing Yield Evaluation in VLSI/WSI Arrays, B., B. Ciciani, ed., IEEE Computer Society Press, 1994 (Eds.), (April 1990)  
  51. "Systolic Arrays for Solving Toeplitz Systems of Equations", Chun, J., Roychowdhury, V.P., Kailath, T., In: Spectral Analysis in One or Two Dimensions, Oxford & IBH Publishing Co., S. Prasad and R.L. Kashyap eds. (Eds.), (February 1990)  
  52. "Decoding of Rate k/n Convolutional Codes in VLSI", Roychowdhury, V.P., Gulak, P.G., Kailath, T., In: Concurrent Computations: Algorithms, Architecture, and Technology, S.K. Tewksbury, B.W. Dickinson, and S.C. Schwartz, eds., Plenum Press (Eds.), 659-674 (1988)  

CONFERENCES: 

  1. "Information Resonance on Twitter: Watching Iran", Zhou, Z., Bandari, R., Kong, J.S., Qian, H., Roychowhury, V.P., 1st Workshop on Social Media Analytics (SOMA '10), ACM, Washington, DC, USA., (07/25/2010)  
  2. "Selfish Distributed Compression over Networks", Ramamoorthy, A., Roychowdhury, V., Singh, S.K., IEEE INFOCOM 2009 Proceedings, 3011-3013 (2009)  
  3. "To Broad-Match or Not to Broad-Match : An Auctioneer's Dilemma?", Singh, S., Roychowdhury, V., Fourth Workshop on Ad Auctions 2008, Chicago, Illinois., (July 2008) 10 pp.  
  4. "Capacity Constraints and the Inevitability of Mediators in Adword Auctions", Singh, S.K., Roychowdhury, V., Gunadhi, H., Rezae, B., Internet and Network Economics, Third International Workshop, WINE 2007, Xiaotie Deng and Fan Chung Graham (Ed.), Spinger, 318-325 (12/12/2007) 6 Pages  
  5. "Price of Structured Routing and Its Mitigation in P2P Systems under Churn", Kong, J.S., Roychowdhury, V., Proceedings of the Seventh International Conference on Peer-to-Peer Computing (P2P'07), Galway, Ireland, 97-104 (09/03/2007)  
  6. "An End-to-End Solution to Scalable Unstructured P2P Networking", Sarshar, N., Roychowdhury, V., Proceedings of the Seventh International Conference on Peer-to-Peer Computing (P2P'07), Galway, Ireland, 123-131 (09/03/2007)  
  7. "Comparison of Image Similarity Queries in P2P Systems", Muller, W., Boykin, P.O., Sarshar, N., Roychowdhury, V.P., Peer-to-Peer Computing, 2006. P2P 2006. Sixth IEEE International Conference on, 98-105 (September 2006) 8 Pages  
  8. "A General Framework for Scalability and Performance Analysis of DHT Routing Systems", Kong, J.S., Bridgewater, J.S.A., Roychowdhury, V.P., Proceedings of The International Conference on Dependable Systems and Networks (DSN-2006); June 25-28, 2006, Philadelphia, USA., 343-354 (June 2006)  
  9. "Scalable and Reliable Collaborative Spam Filters: Harnessing the Global Social Email Networks", Kong, J.S., Boykin, P.O., Rezaei, B.A., Sarshar, N., Roychowdhury, V.P., Proceedings of the Second Conference on Email and Anti-Spam (CEAS 2005), 1-8 (July 2005) LINK
  10. "Random Walks in a Dynamic Small-world Space: Robust Routing in Large-scale Sensor Networks", Rezaei, B.A., Sarshar, N., Roychowdhury, V.P., Proceedings 2004 IEEE 60th Vehicular Technology Conference (VTC2004-Fall), 7:4640 - 4644 (September 2004)
  11. "Synchronized Oscillations and Chaos in Coupled Genetic Repressilators", Gao, J., Bridgewater, J., Roychowdhury, V.P., Proceedings 2004 IEEE Computational Systems Bioinformatics Conference, 630-631 (August 2004)  
  12. "Percolation Search in Power Law Networks: Making Unstructured Peer-to-Peer Networks Scalable", Sarshar, N., Boykin, P.O., Roychowdhury, V.P., Proceedings 4th International Conference on Peer-to-Peer Computing, 2-9 (August 2004)  
  13. "IP Packet Level vBNS Traffic Analysis and Modeling", Gao, J.-B., Roychowdhury, V.P.,, Proceedings of the 2001 International Symposium on Performance Evaluation of Computer and Telecommunication Systems, 178-185 (2001) San Diego, CA.  
  14. "Multi-I/O and Reconfigurable RF/Wireless Interconnect Based on Near Field Capacitive Coupling and Multiple Access Techniques", Chang, M.F., Roychowdhury, V.P., Zhang, L.Y., Zhou, S.N., Wang, Z.Y., Wu, Y.C., Ma, P.X., Lin, C.S., Kang, Z.J., 21-22 (2000)  
  15. "Optimal Communication Algorithms for Heterogeneous Computing Over ATM Networks", Wang, X., Roychowdhury, V.P., Proceedings of the 1996 International Conference on Parallel Processing (ICPP), I-22-I-25 (August 1996) Chicago, Illinois, August 12-16, 1996  
  16. "Computing with Heterogenious Parallel Machines: Advantages and Challenges", Siegel, H.J., Wang, L., Roychowdhury, V.P., Tan, M., Second International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN96), 368-374 (June 1996) invited keynote paper, Beijing, China
  17. "A Genetic-Algorithm-Based Approach for Task Matching and Scheduling in Heterogeneous Computing Environments", Wang, L., Siegel, H.J., Roychowdhury, V.P., 1996 Heterogeneous Computing Workshop (HCW '96), 72-85 (April 1996) Honolulu, Hawaii  
  18. "Minimizing Communication Overhead for Matrix Inversion Algorithms on Hypercubes", Wang, X., Roychowdhury, V.P., Proc. of the 9th International Parallel Processing Symposium (IPPS '95), 446-450 (April 1995) Santa Barbara, California  
  19. "Scheduling In and Out Forests in the Presence of Communication Delays", Varvarigou, T., Roychowdhury, V.P., Kailath, T., Proc. of the International Parallel Processing Symposium (IPPS'93), 222-229 (April 1993) Newport Beach, California  
  20. "Optimal Depth Neural Networks for Multiplication and Related Problems", Siu, K.Y., Roychowdhury, V.P., Advances in Neural Information Processing Systems 5, S.J. Hanson, J.D. Cowan, C. Lee Giles, eds. (Eds.), 59-64 (April 1993) San Mateo, California  
  21. "Computing with Almost Optimal Size Neural Networks", Siu, K.Y., Roychowdhury, V.P., Kailath, T., Advances in Neural Information Processing Systems 5, S.J. Hanson, J.D. Cowan, C. Lee Giles, eds. (Eds.), 19-26 (April 1993) San Mateo, California  
  22. "Massively Parallel Solution of Quantum Transport Problems", Balasingam, P., Roychowdhury, V.P., Proc. of the Fourth Symposium on Frontiers of Massively Parallel Computation (FRONTIERS'92), 506-507 (October 1992) McLean, Virginia  
  23. "Rational Approximation, Harmonic Analysis and Neural Networks", Siu, K.Y., Roychowdhury, V.P., Kailath, T., Proc. of the Int'l. Joint Conference on Neural Networks (IJCNN'92), I:121 - 126 (June 1992) Baltimore, Maryland  
  24. "Circuit Complexity for Neural Computation", Siu, K.Y., Roychowdhury, V.P., Kailath, T., Proc. of the Third Australian Conference on Neural Networks, 33-36 (February 1992) Canberra, Australia  
  25. "Circuit Complexity for Neural Computation", Siu, K.Y., Roychowdhury, V.P., Kailath, T., Proc. of the 25th Asilomar Conf. on Signals, Systems and Computers, 487-490 (November 1991) Monterey, California (invited)  
  26. "A Geometric Approach to Threshold Circuit Complexity", Roychowdhury, V.P., Siu, K.Y., Proc. of the Fourth Annual Workshop on Computational Learning Theory (COLT'91), Morgan Kaufman, publisher (Ed.), 97-111 (August 1991) San Mateo, California  
  27. "Computing with Almost Optimal Size Threshold Circuits", Siu, K.Y., Roychowdhury, V.P., Kailath, T., Proc. of the International Symposium on Information Theory, (July 1991) Budapest, Hungary  
  28. "On the Circuit Complexity of Neural Networks", Roychowdhury, V.P., Siu, K.Y., Orlitsky, A., Kailath, T., Advances in Neural Information Processing Systems 3, D.S. Touretzky, R. Lippman eds. (Eds.), 953-959 (April 1991) San Mateo, California  
  29. "Segmented Channel Routing is as Efficient as Conventional Routing (and Just as Hard)", El Gamal, A., Greene, J., Roychowdhury, V.P., Proc. of the 13th Conference on Advanced Research in VLSI, 192-211 (March 1991) UC Santa Cruz, California  
  30. "Reconfiguring Arrays Using Multiple Track Models", Varvarigou, T., Roychowdhury, V.P., Kailath, T., Proc. of the International Conference on Wafer Scale Integration, 307-313 (January 1991) San Francisco, California  
  31. "Depth-Size Tradeoffs for Neural Computation", Siu, K.Y., Roychowdhury, V.P., Kailath, T., Proc. of the International Symposium on Info. Theory and Applications, (November 1990) Hawaii  
  32. "Study of Parallelism in Regular Iterative Algorithms", Roychowdhury, V.P., Kailath, T., Proc. of the 2nd Annual ACM Symposium on Parallel Algorithms and Architectures (SPAA'90), 367-376 (July 1990) Crete, Greece  
  33. "Optimal solution to the affine communication problem", Lothar Thiele and Vwani Roychowdhury, Int. Workshop on Algorithms and Parallel VLSI Architectures, Pont-a-Mousson, France., 122-126 (June 1990)
  34. "Segmented Channel Routing", Greene, J., Roychowdhury, V., Kaptanoglu, S., El Gamal, A., Proc. of the 27th ACM/IEEE Design Automation Conference, 567-572 (June 1990)  
  35. "Systematic design of local processor arrays for numerical algorithms", Lothar Thiele and Vwani Roychowdhury, Parallel Algorithms and VLSI Architectures: Volume A (E. Deprettere Ed.), North Holland Publishers, 329-339 (January 1990)
  36. "Some New Algorithms for Reconfiguring VLSI/WSI Arrays", Varvarigou, T., Roychowdhury, V., Kailath, T., Proc. of the International Conference on Wafer Scale Integration, 229-235 (January 1990) San Francisco, California  
  37. "On the Number of Spurious Memories in the Hopfield Neural Networks", Bruck, J., Roychowdhury, V.P., Proc. of the International Symposium on Information Theory, 9 (January 1990) San Diego, California  
  38. "On Finding Non-Intersecting Paths in a Grid and its Application in Reconfiguration of VLSI/WSI Arrays", Roychowdhury, V.P., Bruck, J., Proc. of the First Annual ACM-SIAM Symposium on Discrete Algorithms (SODA-90), 454-461 (January 1990) San Francisco, California  
  39. "Efficient Algorithms for Reconfiguration in VLSI/WSI Arrays", Roychowdhury, V.P., Bruck, J., Kailath, T., Proc. of the International Workshop on Hardware Fault Tolerance In Multiprocessors, 27-29 (June 1989) Univ. of Illinois, Urbana  
  40. "Scheduling Linearly Indexed Assignment Codes", Kailath, T., Roychowdhury, V.P., Proc. SPIE Symposium on High Speed Computing II, 1058:118 - 129 (January 1989) Los Angeles, California  
  41. "On the Localization of Algorithms for VLSI Processor Arrays", Roychowdhury, V.P., Thiele, L., Rao, S.K., Kailath, T., Proc. of the IEEE Workshop on VLSI Signal Processing, 459-470 (November 1988) Monterey, California  
  42. "Systolic Arrays for Solving Toeplitz Systems of Equations", Chun, J., Roychowdhury, V.P., Kailath, T., Proc. of the 32nd SPIE Symposium on Advanced Algorithms and Architectures for Signal Processing III, 19-26 (August 1988) San Diego, California  
  43. "Regular Processor Arrays for Matrix Algorithms with Pivoting", Roychowdhury, V.P., Kailath, T., Proceedings of the International Conf. on Systolic Arrays, 237-246 (May 1988) San Diego, Calif.  
  44. "Decoding of Rate 1/n Convolutional Codes in VLSI", Gulak, P.G., Roychowdhury, V.P., Kailath, T., Proc. of the 1986 IEEE International Symposium on Information Theory (ISIT), 19 (10/06/1986) Ann Arbor, MI, October 6-9, 1986  
  45. "A Nonsystolic Algorithm Implementable on Regular Processor Arrays", Roychowdhury, V.P., Kailath, T., Proc. International Symposium on Circuits and Systems, 1328-1331 (March 1986) San Jose, California